Nvidia Vera Rubin Ramp Strains TSMC Taiwan Supply Chain

Nvidia CEO Jensen Huang flew to Taiwan to lock in TSMC packaging capacity for the Vera Rubin AI platform, as the company posted record quarterly revenue.

Nvidia Vera Rubin Ramp Strains TSMC Taiwan Supply Chain

Nvidia logo, as Jensen Huang visits TSMC in Taiwan over Vera Rubin

Nvidia CEO Jensen Huang landed at Taipei’s Songshan Airport on Saturday, May 23, ahead of Computex 2026 and a GTC Taipei keynote. The central purpose of the trip, however, was a meeting with TSMC Chairman C.C. Wei to lock in production commitments for Nvidia’s next-generation Vera Rubin platform — a system Huang has called “the largest product launch, probably in the history of Taiwan.”

Record earnings set the stage

Three days earlier, Nvidia posted record fiscal first-quarter 2027 revenue of $81.62 billion, an 85% year-over-year increase that beat analyst expectations by more than 3%. Data center revenue — now 90% of the company’s total — reached $75.2 billion, up 92% from a year earlier. Nvidia also authorized an additional $80 billion in share buybacks and raised its quarterly dividend from $0.01 to $0.25 per share, guiding second-quarter revenue to roughly $91 billion while assuming zero China data center compute revenue.

Vera Rubin: Nvidia's most complex platform

Vera Rubin is a six-chip system combining the Vera CPU, the Rubin GPU, an NVLink 6 switch, a ConnectX-9 SuperNIC, a BlueField-4 data processing unit and a Spectrum-X ethernet switch. Each NVL72 configuration connects 36 Vera CPUs and 72 Rubin GPUs, contains nearly two million parts and draws on roughly 150 Taiwanese supply-chain partners to assemble. Nvidia says the platform delivers about 3.5 times the training performance and five times the inference performance of its Blackwell predecessor, while cutting inference costs to one-seventh. Huang also said the new Vera CPU opens a brand-new $200 billion total addressable market in the CPU segment. The push to build out AI compute mirrors moves such as Kawasaki’s new physical AI center in Silicon Valley.

The CoWoS packaging bottleneck

The constraint Huang’s TSMC meeting is meant to address is not silicon fabrication but advanced packaging. TSMC’s CoWoS (Chip-on-Wafer-on-Substrate) technology integrates GPU or CPU dies with high-bandwidth memory into the unified package Nvidia’s accelerators require. TSMC is scaling CoWoS output from roughly 35,000 wafers per month in late 2024 toward a projected 120,000 to 140,000 per month by the end of 2026, yet Wei has said capacity remains sold out through 2025 and into 2026. Nvidia has reportedly pre-committed more than half of TSMC’s available CoWoS capacity through 2027, intensifying competition for the remainder among rivals and reshaping the broader semiconductor foundry landscape.

China share collapses as Huawei gains

The guidance reflects a stark reality: Nvidia’s share of China’s AI accelerator market has fallen from roughly 95% to effectively zero amid US export restrictions. Huawei has been the main beneficiary, with its Ascend 950PR chip entering mass production in March 2026 and AI chip revenue projected to reach $12 billion this year — a jump that has accelerated China’s domestic push for homegrown AI silicon. A December 2025 framework that authorized limited H200 sales to about 10 approved Chinese firms has so far produced no deliveries. Separately, Taiwanese prosecutors recently opened an investigation into individuals suspected of using forged documents to illegally export Super Micro AI servers containing Nvidia chips.

Reporting based on coverage from Tech Times.

Category: AI & Technology

Tags: US-China trade artificial intelligence Supply Chain data centers

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