TSMC's 1.6nm A16 Node Slated For Q4 2026 Mass Production, Roadmap Holds

TSMC confirmed its 1.6nm-class A16 process is on track for high-volume manufacturing in the fourth quarter of 2026, targeting datacenter AI accelerators with backside power delivery.

TSMC's 1.6nm A16 Node Slated For Q4 2026 Mass Production, Roadmap Holds

TSMC has completed development of its 1.6-nanometer-class A16 process and is preparing volume manufacturing in the fourth quarter of 2026, according to Liberty Times and ChosunBiz reports circulated on August 20, 2026 and echoed by Tom's Hardware. The timeline aligns with TSMC's own published guidance, which had pointed to A16 high-volume manufacturing (HVM) in the second half of 2026.

Backside power delivery arrives at the leading edge

A16 is the first angstrom-class CMOS platform to feature Super Power Rail (SPR), TSMC's implementation of a backside power delivery network. Moving the power rails to the wafer's back frees up frontside routing tracks for signals, cuts IR drop and, in TSMC's own numbers, delivers 8-10% faster performance at the same power, 15-20% lower power at the same speed and 8-10% higher chip density versus N2P.

Aimed at AI accelerators and HPC first

The initial customer set is expected to be datacenter-grade AI and high-performance computing chips. TSMC has previously flagged that early A16 tape-outs skew toward hyperscalers designing accelerators around HBM3E and HBM4, with a backside power network that also helps them tame thermals on multi-reticle designs and CoWoS packaging. Chinese-language reports suggest early alpha customers will only ship products in 2027.

TSMC A16 wafer at OIP 2024

Widening the gap over Samsung and Intel

The confirmation lands as Samsung Foundry hikes 4nm and 5nm prices to soak up spillover AI demand and Intel pushes its 14A node toward risk production. TSMC has also already signed a $6.4 billion image-sensor JV with Sony and inked a fresh $100 billion Arizona expansion, giving it capacity headroom to ramp N2, N2P and A16 in parallel.

The A16 milestone lines up with a broader industry pivot toward physical-layout innovation - backside power, hybrid bonding, glass substrates and multi-die packaging - as pure lithography scaling slows. If Q4 2026 holds, TSMC will be the first foundry with a customer-facing angstrom-class process with backside power delivery in the market, ahead of Samsung's SF1.4 and Intel's 14A follow-ons.

Reporting based on coverage from Tom's Hardware, ChosunBiz and Liberty Times.

Category: AI & Technology

Tags: Semiconductors Nvidia TSMC Semiconductor Foundry AI Chips

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