D-Wave Quantum has published peer-reviewed research in Nature demonstrating a two-qubit entangling gate for its superconducting dual-rail erasure qubit architecture, hitting roughly 99.9% fidelity with gate times near 500 nanoseconds while preserving native hardware-level error detection.
Why dual-rail matters for fault tolerance
The paper, An entangling gate for dual-rail erasure qubits, details a new Swap-Wait-Swap controlled-phase (CZ) gate executed between dual-rail cavity qubits linked via a tunable transmon coupler. D-Wave says the design keeps the most common quantum errors easy to detect, cutting the physical qubit overhead required for scalable error correction.
Roadmap targets Lambda of 10 by 2032
D-Wave's simulations indicate the architecture could shrink the logical error rate by a factor of 10 for each increment in error correction — an error-suppression measure the company calls Lambda. The result supports D-Wave's gate-model roadmap targeting a 100-logical-qubit system capable of more than 1 million operations by 2032.
Comments from D-Wave leadership
"Gate-model quantum computing's greatest remaining challenge is not simply building more qubits — it is building systems that can correct errors efficiently as they scale," said D-Wave CEO Alan Baratz. Chief scientist Robert Schoelkopf added that the entangling gate is already integrated into D-Wave's gate-model systems. The result lands alongside a busy week for the sector that also included QuiX Quantum's Alquor 2.0 launch and D-Wave's Verafin partnership.
Reporting based on coverage from Nature, D-Wave Quantum Inc. and The Quantum Insider.