British chip startup Signaloid has completed the tapeout of its first AI accelerator, a processor it says is built specifically for the energy-hungry, uncertainty-laden workloads of robotics and physical AI. Engineering samples of the chip, known as the C0-ASIC, are expected to reach its first customer in the third quarter of 2026.
A different way to compute uncertainty
The C0-ASIC is based on Signaloid's distribution-extended computing architecture, which restructures certain calculations mathematically rather than brute-forcing them the way conventional CPUs and GPUs do. For workloads that revolve around probability, uncertainty and randomized calculations, the company says that approach can sharply cut the energy required, exactly the kind of math that perception and decision-making stacks on robots lean on.
Signaloid was founded by former University of Cambridge professor Phillip Stanley-Marbell and already serves more than 3,000 customers and researchers across cloud, on-premises and edge deployments. The C0-ASIC is its move from software and FPGA tooling into dedicated silicon.
Government and industry backing
The UK's Advanced Research and Invention Agency (ARIA) plans to deploy systems based on the chip to evaluate next-generation AI techniques, including second-order methods that aim to make training and optimization more efficient. "We believe randomized linear algebra represents a fundamentally new and powerful technique underpinning many applications in computer science including AI," said ARIA program director Suraj Bramhavar, adding that exploiting those principles in hardware "could provide an entirely new vector for improved performance."
Built with the semiconductor establishment
Signaloid developed the C0-ASIC with design partners IC-Link, part of imec, and Cadence Design Systems, with manufacturing handled by TSMC. Additional FPGA-based systems using the same architecture are under discussion for deployment in the UK and Switzerland later this year. The effort sits alongside a broader industry push to close the hardware gap for embodied AI, seen in moves such as the expanded Cadence-NVIDIA physical AI partnership, the NVIDIA-SK hynix memory pact and new silicon brands like Qualcomm's Dragonfly data-center line.
Reporting based on coverage from AI Insider and Signaloid.