SEALSQ and GlobalFoundries signed a strategic MoU on July 8, 2026 to co-develop post-quantum cryptography IP, chiplet HSMs and cryogenic CMOS for future quantum computing systems.
Key Takeaways
SEALSQ (Nasdaq: LAES) and GlobalFoundries (Nasdaq: GFS) signed a strategic MoU on July 8, 2026 to co-develop secure semiconductor platforms, post-quantum cryptography (PQC) and quantum computing technologies.
The three-track program includes certified PQC security IP hard-macros and Chiplet Hardware Security Module (CHSM) blocks built with MIPS, a GF company, plus cryogenic CMOS ASICs to control future quantum processors.
Both companies framed the deal as a sovereign-supply-chain play, keeping trust anchors, hardware roots of trust and quantum controllers on trusted foundries aligned with EU and U.S. priorities.
Pre-certified hard-macros supporting NIST's ML-KEM and ML-DSA standards could shorten qualification timelines for defense, telecom and industrial customers preparing for Q-Day.
The cryogenic CMOS work extends GF's newly announced Quantum Technology Solutions business and SEALSQ's quantum ASIC ambitions, including its earlier bets alongside Quobly in silicon quantum computing.
Kaan Tınmaz
SEALSQ Corp (Nasdaq: LAES) and GlobalFoundries (Nasdaq: GFS) on July 8, 2026 unveiled a strategic Memorandum of Understanding to co-develop secure semiconductor platforms, Post-Quantum Cryptography (PQC) and semiconductor-based quantum computing technologies, marking one of the largest transatlantic quantum-security tie-ups of the year.
What the MoU covers
The three-track program leans on GF's process leadership and manufacturing base and on SEALSQ's certified secure microcontrollers, PKI-ready silicon and quantum investments. Together the partners will build certified PQC security IP hard-macros and Chiplet Hardware Security Module (CHSM) blocks alongside MIPS, a GF company, aimed at Hardware Security Modules and Secure Enclaves. A second track will design cryogenic CMOS ASICs to control future quantum processors, extending GF's freshly announced Quantum Technology Solutions business and SEALSQ's ambitions in quantum ASICs.
Sovereign supply chains front and center
Both companies framed the deal as a sovereign-supply-chain play, aligning with European and U.S. priorities to keep critical trust anchors, hardware roots of trust and quantum controllers on trusted foundries. Carlos Moreira, SEALSQ CEO, said semiconductors, cybersecurity, post-quantum cryptography and quantum computing are converging into a single ecosystem. GF vice president of Quantum Technology Solutions Nicholas Sergeant added the initiative builds "trusted digital infrastructure secured by PQC and the semiconductor technologies that will enable future quantum computing systems."
Why it matters
NIST's ML-KEM and ML-DSA post-quantum standards demand new hardware acceleration paths, larger keys and heavier handshakes. Baking those primitives into pre-certified hard-macros and CHSM chiplets could compress qualification timelines for defense, telecom and industrial customers preparing for Q-Day. The cryogenic CMOS collaboration lands as GF signals it wants a slice of the quantum control-electronics stack, complementing its edge-silicon momentum and echoing SEALSQ's earlier bets alongside Quobly on silicon quantum computing. It also lands the same day that Brussels tightened AI-cybersecurity oversight, adding regulatory tailwind for quantum-safe chips.
Reporting based on coverage from The Quantum Insider, GlobeNewswire and StockTitan.
What did SEALSQ and GlobalFoundries agree to on July 8, 2026?
They signed a strategic Memorandum of Understanding to co-develop secure semiconductor platforms, post-quantum cryptography IP, chiplet hardware security modules (CHSMs) and cryogenic CMOS ASICs for future quantum computing systems, one of the largest transatlantic quantum-security tie-ups of the year.
What are the main technology tracks of the partnership?
Certified PQC security IP hard-macros and CHSM blocks developed with MIPS (a GF company) for hardware security modules and secure enclaves, plus cryogenic CMOS ASICs designed to control future quantum processors.
Why does the deal matter for post-quantum security?
NIST's ML-KEM and ML-DSA standards require new hardware acceleration, larger keys and heavier handshakes; baking these primitives into pre-certified hard-macros and chiplets could compress qualification timelines for customers preparing for Q-Day.
How does the MoU relate to sovereign supply chains?
Both companies positioned it as a sovereign-supply-chain initiative aligned with European and U.S. priorities to keep critical trust anchors, hardware roots of trust and quantum controllers manufactured on trusted foundries.
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