Xiaomi Debuts 3nm Xring O3 With LPDDR6, Plus AI and Auto-Driving Chips

Xiaomi's second-generation flagship SoC arrives on TSMC's 3nm N3P with 24 billion transistors, LPDDR6 support and 200 TOPS of AI, alongside a stacked AI accelerator and a 3nm autonomous-driving chip.

Xiaomi Debuts 3nm Xring O3 With LPDDR6, Plus AI and Auto-Driving Chips

Xiaomi on August 24, 2026 unveiled the Xring O3, a 3-nanometer flagship mobile processor that the company describes as the world's first smartphone SoC to support LPDDR6 memory. The launch, led by Xring chip division head Zhu Dan and detailed in a Weibo briefing from CEO Lei Jun, arrived 459 days after the debut of Xiaomi's first-generation Xring O1 and was accompanied by two additional chips aimed at large-model AI and intelligent driving.

Xring O3: 3nm N3P silicon built for Xiaomi's own AI models

Manufactured on TSMC's N3P node, the Xring O3 packs 24 billion transistors onto a 133mm² die, a 26% jump in transistor count over its predecessor. Xiaomi has ditched efficiency cores in favor of a 10-core all-big CPU cluster and paired it with a new 16-core G2-Ultra NX GPU that is claimed to be up to 85% faster while consuming 64% less power. Memory support runs to LPDDR6 with 113.8GB/s of bandwidth, a 48% uplift versus the Xring O1.

The AI subsystem has been rebuilt around Xiaomi's on-device MiMo models. A redesigned NPU delivers 200 TOPS of tensor throughput and 3.13 TFLOPS of vector performance, and additional accelerators inside the CPU and GPU push AI performance up by roughly 45% versus the previous generation. Xiaomi says the chip has posted an AnTuTu score of 5.22 million, ahead of every other current flagship SoC. The Xiaomi 18 Fold and Xiaomi Pad 9 Pro Max, both due in China in September, are set to launch with the Xring O3.

Xring O100: a 6nm 3D-stacked accelerator for on-device large models

Alongside the flagship SoC, Xiaomi introduced the Xring O100, a 6nm wafer-on-wafer 3D-stacked AI accelerator that Xiaomi calls the industry's first WoW packaging solution using hybrid bonding at a 1.4µm pitch. The chip is designed to run large AI models on device at up to 330 tokens per second, with 1.22TB/s of internal bandwidth—about 16x that of a conventional flagship phone—positioning Xiaomi to compete for private, low-latency generative-AI workloads on consumer hardware.

AI semiconductor wafer close-up

Xring D100 targets 200-billion-parameter driving models

The third chip, the Xring D100, is what IT Home describes as China's first 3nm high-compute AI processor for intelligent driving. It pairs a 20-core high-performance CPU with a 16-core NPU and supports up to 160GB of unified memory, enough to run driving models with 200 billion parameters locally. Xiaomi says development is complete and commercial deployment will begin next year, extending the company's chip ambitions from smartphones into its EV and robotics stack. Together with recent moves like Xiaomi's open-source Robotics-1 VLA foundation model and the Tieda CyberOne 2 humanoid, the Xring family gives Xiaomi in-house silicon across phones, cars and robots and further reduces its dependence on third-party mobile silicon from Qualcomm and MediaTek.

Why it matters for AI hardware

By pushing three custom chips out at once—a 3nm flagship SoC, a 3D-stacked AI accelerator and an intelligent-driving processor—Xiaomi is making one of the most aggressive vertical-silicon plays yet from a Chinese consumer-tech brand, while also reinforcing TSMC's role as the foundry of choice for advanced Chinese customer designs.

Reporting based on coverage from TrendForce, IT Home, EE Times China and Lei Jun's Weibo briefing.

Category: AI & Technology

Tags: AI China Semiconductors TSMC AI Chips

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